Mar 11, 2014

ISRO COMPUTER SCIENCE - 2013 SET A (Q1 to Q20)

1]Let A(1:8, -5:5, -10:5) be a three dimensional array. How many elements are there in the array A?
a 1200
b 1408
c 33
d 1050


2]The number of rotations required to insert a sequence of elements 9,6,5,8,7,10 into an empty AVL tree is?
a 0
b 1
c 2
d 3


3]Opportunistic reasoning is addressed by which of the following
knowledge representation
a Script
b Blackboard
c Production Rules
d Fuzzy Logic


4]The following steps in a linked list
p = getnode()

info (p) = 10
next (p) = list
list = p
result in which type of operation?
a pop operation in stack
b removal of a node
c inserting a node
d modifying an existing node


5]Shift reduce parsing belongs to a class of
a bottom up parsing
b top down parsing
c recursive parsing
d predictive parsing


6]Which of the following productions eliminate left recursion in the productions given below:

 Ans:d

7]Consider the following psuedocode:

x : integer := 1
y: integer := 2
 

procedure add
x:= x + y
 

procedure second (P: procedure)
x : integer := 2
P();


procedure first
y : integer := 3
second(add)


first()
write_integer (x)


What does it print if the language uses dynamic scoping with deep
binding?
a 2
b 3
c 4
d 5 



Ans:
Ref1:
Deep binding binds the environment at the time the procedure is passed as an argument

Shallow binding binds the environment at the time the procedure is actually called

So for dynamic scoping with deep binding when add is passed into second the environment is x = 1, y = 3 and the x is the global x so it writes 4 into the global x, which is the one picked up by the write_integer.

Shallow binding just traverses up until it finds the nearest variable that corresponds to the name so the answer would be 2+3=5

8]Which logic gate is used to detect overflow in 2's complement
arithmetic?
a OR gate
b AND gate
0 NAND gate
d XOR gate


Ans:
When adding two binary values, consider the binary carry coming into
the leftmost place (into the sign bit) and the binary carry going out
of that leftmost place.  (Carry going out of the leftmost [sign] bit
becomes the CARRY flag in the ALU.)

The reason for the rules is that overflow in two's complement may occur,
not when a bit is carried out out of the left column, but when one is
carried into it and no matching carry occurs. That is, when there is
a carry into the sign bit but no carry out of the sign bit.

The OVERFLOW flag is the XOR of the carry coming into the sign bit (if
any) with the carry going out of the sign bit (if any).  Overflow happens
if the carry in does not equal the carry out.

Examples (2-bit signed 2's complement binary numbers):

    11
   +01
   ===
    00

   - carry in is 1
   - carry out is 1
   - 1 XOR 1 = NO OVERFLOW

    01
   +01
   ===
    10
 
   - carry in is 1
   - carry out is 0
   - 1 XOR 0 = OVERFLOW!

    11
   +10
   ===
    01

   - carry in is 0
   - carry out is 1
   - 0 XOR 1 = OVERFLOW!


    10
   +01
   ===
    11

   - carry in is 0
   - carry out is 0
   - 0 XOR 0 = NO OVERFLOW
 
9]In an array of 2N elements that is both 2-ordered and 3-ordered,what is the maximum number of positions that an element can be
from its position if the array were 1-ordered?
a 1
b 2
c N/2
d 2N-1


10]if the frame buffer has 8 bits per pixel and 8 bits are allocated for
10 each of the R, G, B components, what would be the size of the
lookup table?
a 24 bytes
b 1024 bytes
0 768 bytes
d 256 bytes


11 When two BCD numbers 0x14 and 0x08 are added what is the binary
representation of the resultant number?
a 0x22
b 0x1c '
c 0x16
d results in overflow

 

12 Which of the following sorting algorithms has the minimum running
time complexity in the best and average case?
a Insertion sort, Quick sort
b Quick sort, Quick sort
c Quick sort, Insertion sort
d Insertion sort, Insertion sort

 

13 The number 1102 in base 3 is equivalent to 123 in which base
system?
a 4
b 5
c 6
d 8

 

A processor is fetching instructions at the rate of 1 MIPS. A DMA
14 module is used to transfer characters to RAM from a device
transmitting at 9600 bps. How much time will the processor be
slowed down due to DMA activity?
a 9.6 ms
b 4.8 ms
c 2.4 ms
d 1.2 ms

 

A pipeline P operating at 400 MHz has a speedup factor of 6 and
15 operating at 70% efficiency. How many stages are there in the
pipeline?
a 5
b 6
c 8
d 9

 

16 How much speed do we gain by using the cache, when cache is
used 80% of the time? Assume cache is faster than main memory.
a 5.27
b 2.00
c 4.16
cl 6.09


Two eight bit bytes 1100 0011 and 01001100 are added. What are the
17 values of the overflow, carry and zero flags respectively, if the
arithmetic unit of the CPU uses 2's complement form?
a O, 1, 1’
b 1, 1, O
c 1, O, 1
d O, 1, O

 

18 How many check bits are required for 16 bit data word to detect 2 bit
errors and single bit correction using hamming code?
a 5
b 6
c 7
d 8
 

19 What is the maximum number of characters (7 bits + parity ) that can
be transmitted in a second on a 19.2 kbps line. This asynchronous
transmission requires 1 start bit and 1 stop bit.
a 192-
b 240
c 1920
d 1966

 

20 IEEE 1394 is related to
a RS-232
b USB
c Firewire
d PCl

What will be the cipher text produced by the following cipher

17 comments:

  1. Refer to this link for Q 15

    http://www.seas.gwu.edu/~bhagiweb/cs211/lectures/pipeline.ppt

    ReplyDelete
  2. Please explain the answer for 2
    The avl tree is a binary search tree can differ by atmost 1

    ReplyDelete
    Replies
    1. in insertion method of AVL tree , at each step balance factor is calculated and according to that rotation takes place..

      Delete
  3. sir , you are write ,there will be 3 rotation.

    ReplyDelete
  4. How come three rotation is possible..only one rotation

    ReplyDelete